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Item specifics
  • is_customized: YES
  • Power: Low Power
  • Name: Waveshare
  • Frequency: Low Frequency
  • Model Number: CoreEP4CE6
  • Category: FPGA Core Board
  • For use with: EP4CE6 Development & Evaluation
  • Onboard MCU: EP4CE6E22C8N (ALTERA Cyclone IV)
  • Feature 1: 1 x EPCS16SI8N, nCONFIG button, RESET button, 4 x LEDs
  • Place of Origin: Guangdong, China (Mainland)
Product Description
Operating Frequency:50MHz
Operating Voltage:1.15V~3.465V
Debugging/Programming:Supports JTAG


FPGA core board, features the ALTERA Cyclone IV chip EP4CE6E22C8N onboard

Overview

CoreEP4CE6 is an FPGA core board that features an EP4CE6E22C8N deve onboard, supports further expansion.
  • onboard Serial Configuration Deve EPCS16SI8N
  • integrated FPGA bas circuit, such as clock circuit
  • onboard nCONFIG button, RESET button, 4 x LEDs
  • all the I/O ports are accessible on the pin headers
  • onboard JTAG debugging/programming interface
  • 2.54mm header pitch design, suitable for being plugged-in your applation system

What\'s on board

  1. EP4CE6E22C8N: the ALTERA Cyclone IV FPGA deve whh features:
    • Operating Frequency: 50MHz
    • Operating Voltage: 1.15V~3.465V
    • Package: QFP144
    • I/Os: 80
    • LEs: 6K
    • RAM: 270kb
    • PLLs: 2
    • Debugging/Programming: supports JTAG
  2. AMS1117-3.3 (on bottom side), 3.3V voltage regulator
  3. AMS1117-2.5 (on bottom side), 2.5V voltage regulator
  4. AMS1117-1.2 (on bottom side), 1.2V voltage regulator
  5. EPCS16 (on bottom side), onboard serial FLASH memory, for storing code
  6. Power indator
  7. LEDs
  8. Reset button
  9. nCONFIG button: for re-configuring the FPGA chip, the equivalent of power reseting
  10. Power switch
  11. 50M active crystal (on bottom side)
  12. 5V DC jack
  13. JTAG interface: for debugging/programming
  14. FPGA pins expander, VCC, GND and all the I/O ports are accessible on expansion connectors for further expansion
  15. LED jumpers

Related Products

Photos

Note:

CoreEP4CE6 provides JTAG debugging interface, yet does NOT integrate any debugging function, a debugger is required.
Mother board and programmer/debugger in the photos are NOT included in the pre.

JTAG Interface

The figure below shows the header pinout of JTAG

Development Resources

The User Guide CD includes development resources listed as follow:
  • Related Software (Quaters II, NIOS II etc.)
  • Demo Code (Verilog, VHDL and NIOS II C)
  • Schemat (PDF)
  • FPGA Development Documentations (Datasheets etc.)

Package Contains

  1. CoreEP4CE6 core board x 1
  2. USB power cable x
  3. User guide CD x 1

For large quantity please feel free to contact us for quotation!
Packaging Details
  • Unit Type: piece
  • Package Weight: 0.2kg (0.44lb.)
  • Package Size: 10cm x 10cm x 10cm (3.94in x 3.94in x 3.94in)
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Packaging Details
  • Unit Type: piece
  • Package Weight: 0.2kg (0.44lb.)
  • Package Size: 10cm x 10cm x 10cm (3.94in x 3.94in x 3.94in)
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